Job Details Job Description: Become a member of our world-class software research and development team! Altera® develops programmable logic technologies to accelerate innovation for many customers worldwide.

You will be designing and developing leading-edge software innovations for Quartus, the tool that optimizes our FPGA devices, within a research-oriented team. The Quartus Placement optimization engines are key to unlocking high performance, area and power efficiency for our customer's design applications.

As part of the Quartus Placement team, your role will include:

• Designing, developing, and improving placement algorithms for our FPGA CAD software tools
• Implementing new features to leverage innovative FPGA hardware features, and improving the software performance, runtime and memory footprint
• Developing enhanced usability features for customers to improve their design productivity
• You will have the opportunity to work closely with and be mentored by technical leaders

Ideal Candidates Exhibit The Following Behavioral Traits

• Intellectual curiosity and a passion for exploring new technology
• Excellent problem-solving, debugging, and attention to detail
• Great communication, teamwork, and interpersonal skills

Qualifications Qualifications: Relevant experience can be obtained through schoolwork, classes and project work, internships, and/or work experience.

Minimum Qualifications

• BS, MS or PhD degree in Computer Engineering, Engineering Science, Electrical Engineering, Computer Science or equivalent
• 2+ years C/C++ programming experience in a Linux and or Windows environment

Desired/Preferred Skills

• Experience coding in C++ for a high performance multi-core system
• Experience developing EDA/CAD optimization algorithms for FPGAs or ASICs
• Experience with Altera Quartus or AMD Vivado software
• Experience with applying machine learning techniques to EDA software
• Experience with combinatorial/continuous optimization, including but not limited to Boolean SAT, stochastic search-based methods, numerical methods for continuous optimization, dynamic programming, and applications to FPGA placement
• Experience with NOC optimization for FPGA placement

Job Type Regular

Shift Shift 1 (Canada)

Primary Location: Toronto, Ontario, Canada

Additional Locations: Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.