Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

We are designing AI hardware that pushes the limits of performance, power efficiency, and scalability. This role focuses on implementing parameterized RTL designs, improving architectural and micro-architectural efficiency, and optimizing for performance, power, and area. You’ll collaborate with architects, designers, and software teams to deliver high-performance AI IP.

This role is hybrid based out of Toronto, CA; Austin, TX; or Santa Clara, CA.

We welcome candidates at various experience levels. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

What We Need

• Implement parameterized RTL designs based on detailed micro-architecture specifications.
• Run synthesis, timing, and power experiments to evaluate and refine designs.
• Enhance RTL design environments, tools, and supporting infrastructure.
• Collaborate with architects to improve performance, power, and area (PPA) across designs.

What You Bring

• A Bachelor’s degree in EE/ECE/CE/CS or a related field (MS or PhD preferred).
• Strong foundational experience in RTL design with a focus on power- and area-efficient architectures.
• An understanding of microprocessor architecture, logic design principles, and their timing/power tradeoffs.
• Proficiency in Python and C/C++ for design automation and low-level development.

What You’ll Learn

• Techniques for writing, analyzing, and optimizing low-level kernels for AI workloads using Tensix ISA features.
• Advanced methods for floating-point arithmetic, low-power micro-architecture, and arithmetic circuit optimization.
• How to account for physical design considerations during RTL and micro-architecture specification.
• Strategies for integrating RTL improvements into a full AI compute stack to maximize real-world performance.

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.