Analog Models & Verification Engineer -High-Speed SerDes - 13269
Top Benefits
About the role
We Are: Open to hiring for this position in Ottawa & in Markham
At Synopsys, we drive innovations shaping the way we live and connect. As leaders in chip design, verification, and IP integration, we empower the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You Are:
You are a highly skilled verification engineer with a passion for modeling and verifying advanced mixed-signal systems. With deep expertise in real number modeling (RNM) and high-speed SerDes, you turn complex analog behaviors into robust, scalable models. You excel at collaborating across engineering teams, thrive in fast-paced environments, and are committed to delivering high-quality, signoff-ready IP. Your detail-oriented and proactive approach ensures accuracy and efficiency in every project.
What You’ll Be Doing:
- Collaborate with analog teams to extract specifications and develop accurate behavioral models for SerDes blocks.
- Validate models against SPICE simulations and silicon data.
- Integrate models into modern verification flows (UVM, MS-MDV).
- Ensure comprehensive test coverage with digital and mixed-signal verification teams.
- Drive improvements in modeling, automation, and methodology.
- Mentor teammates and document best practices.
The Impact You Will Have:
- Accelerate and enhance SerDes IP verification for faster project schedules.
- Deliver high-quality, validated RNM models for confident silicon tapeouts.
- Boost Synopsys’ reputation for reliable connectivity IP.
- Enable early issue detection through advanced simulation.
- Foster cross-team collaboration and knowledge sharing.
What You’ll Need:
- BSc, MSc, or PhD in Electrical/Computer Engineering with 7+ years’ experience.
- Expertise in Verilog, SystemVerilog (RNM, wreal, IEEE 1800-2012 SV-DC).
- Deep knowledge of SerDes sub-blocks (TX/RX, ADC, DAC, etc.).
- Experience modeling analog impairments (jitter, noise, offsets, etc.).
- Proficiency with SPICE tools, Python/TCL/Perl/C/C++, and UVM.
Who You Are:
- Collaborative and adaptable across analog/digital teams.
- Detail-oriented, proactive, and improvement-focused.
- Strong communicator and mentor.
The Team You’ll Be A Part Of:
Join a collaborative, innovative group of analog and mixed-signal experts focused on delivering industry-leading SerDes IP for cutting-edge silicon.
Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits. Your recruiter will provide more details about compensation and benefits during the hiring process.
About Synopsys Inc
Catalyzing the era of pervasive intelligence, Synopsys delivers trusted and comprehensive silicon to systems design solutions, from electronic design automation to silicon IP and system verification and validation.
We partner closely with semiconductor and systems customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.
Analog Models & Verification Engineer -High-Speed SerDes - 13269
Top Benefits
About the role
We Are: Open to hiring for this position in Ottawa & in Markham
At Synopsys, we drive innovations shaping the way we live and connect. As leaders in chip design, verification, and IP integration, we empower the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You Are:
You are a highly skilled verification engineer with a passion for modeling and verifying advanced mixed-signal systems. With deep expertise in real number modeling (RNM) and high-speed SerDes, you turn complex analog behaviors into robust, scalable models. You excel at collaborating across engineering teams, thrive in fast-paced environments, and are committed to delivering high-quality, signoff-ready IP. Your detail-oriented and proactive approach ensures accuracy and efficiency in every project.
What You’ll Be Doing:
- Collaborate with analog teams to extract specifications and develop accurate behavioral models for SerDes blocks.
- Validate models against SPICE simulations and silicon data.
- Integrate models into modern verification flows (UVM, MS-MDV).
- Ensure comprehensive test coverage with digital and mixed-signal verification teams.
- Drive improvements in modeling, automation, and methodology.
- Mentor teammates and document best practices.
The Impact You Will Have:
- Accelerate and enhance SerDes IP verification for faster project schedules.
- Deliver high-quality, validated RNM models for confident silicon tapeouts.
- Boost Synopsys’ reputation for reliable connectivity IP.
- Enable early issue detection through advanced simulation.
- Foster cross-team collaboration and knowledge sharing.
What You’ll Need:
- BSc, MSc, or PhD in Electrical/Computer Engineering with 7+ years’ experience.
- Expertise in Verilog, SystemVerilog (RNM, wreal, IEEE 1800-2012 SV-DC).
- Deep knowledge of SerDes sub-blocks (TX/RX, ADC, DAC, etc.).
- Experience modeling analog impairments (jitter, noise, offsets, etc.).
- Proficiency with SPICE tools, Python/TCL/Perl/C/C++, and UVM.
Who You Are:
- Collaborative and adaptable across analog/digital teams.
- Detail-oriented, proactive, and improvement-focused.
- Strong communicator and mentor.
The Team You’ll Be A Part Of:
Join a collaborative, innovative group of analog and mixed-signal experts focused on delivering industry-leading SerDes IP for cutting-edge silicon.
Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits. Your recruiter will provide more details about compensation and benefits during the hiring process.
About Synopsys Inc
Catalyzing the era of pervasive intelligence, Synopsys delivers trusted and comprehensive silicon to systems design solutions, from electronic design automation to silicon IP and system verification and validation.
We partner closely with semiconductor and systems customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.