WE'RE HIRING! At HTG, you’ll push boundaries with the latest tech and collaborate with a team that loves what they do. Be part of a design services company that is amongst the companies that lead the world in technology and innovation.

Your next chapter starts here. Your responsibilities include:

• Read and understand the architecture and functional requirements specification document(s) and communicate and collaborate with systems engineers and architects.
• Thoroughly validate one or more architectural functional blocks using a combination of simulation, formal, and coverage methods.
• Develop verification, functional coverage and formal verification test plans.
• Create testbench environments and components, agents, scoreboard, and test scenarios using System Verilog UVM and/or C.
• Perform coverage-driven verification, monitor regressions, and debug failures with the support of the function's designer.
• Provide regular status updates on verification progress on a regular basis.
• Experience in using System Verilog, UVM, SVA, and simulators from vendors
• Knowledge of digital analog converters and PLLs
• Proven ability to determine comprehensive digital verification and coverage strategies
• Knowledge of programming languages such as: Python, Make, bash, object-oriented programming, C, C++
• Minimum Bachelor's degree in Electrical or Computer Engineering

Assets:

• Experience with formal verification methods
• Proficiency in bug tracking using Jira and source code management and revision tracking using GIT

High Tech Genesis Inc. is an Equal Opportunity Employer. Diversity and inclusion are at the core of our values.

Please advise High Tech Genesis of any accommodation measures you may require.

Please be advised:

• Applicants must have the legal right to work in Canada.
• Please submit your resume in Microsoft Word format when applying for this position.