Sr Engineer, SoC Design Verification Die-to-Die
About the role
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.
Tenstorrent is seeking a SoC Design Verification Engineer to help validate next-generation multi-chip and chiplet-based SoCs especially with Die-to-Die (D2D). You will work on test development, debug, and infrastructure that ensure robust, high-performance silicon for AI and high-compute applications. This is a hands-on role at the forefront of verification for cutting-edge semiconductor systems.
This role is hybrid, based out of Ottawa, ON.
We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.
Who You Are
- Skilled in SystemVerilog, SV-UVM, and Python with proven verification experience.
- Familiar with AI-assisted coding tools like Copilot, Cursor, or Claude to accelerate DV workflows.
- Comfortable writing detailed test plans, building infrastructure, and debugging complex issues.
- Collaborative engineer who thrives in cross-functional, fast-paced environments.
What We Need
- Develop and maintain D2D tests and supporting verification infrastructure.
- Write, execute, and track test plans for SoC, chiplet, and multi-chip designs.
- Triage, analyze, and debug issues in collaboration with design and architecture teams.
- Leverage modern AI tools to enhance verification productivity and coverage.
- Firmware co-sim with RTL and CPU core debug experience preferred
What You Will Learn
- Gain experience with advanced verification flows for chiplet and multi-die SoCs.
- Work with emerging standards like UCIe and BoW for die-to-die interconnect.
- Explore co-simulation methodologies with frameworks such as Cocotb.
- Build expertise in the intersection of AI tools and state-of-the-art verification practices.
Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
About Tenstorrent
Tenstorrent is a next-generation computing company that builds computers for AI.
Headquartered in the U.S. with offices in Austin, Texas, and Silicon Valley, and global offices in Toronto, Belgrade, Seoul, Tokyo, and Bangalore, Tenstorrent brings together experts in the field of computer architecture, ASIC design, RISC-V technology, advanced systems, and neural network compilers. Tenstorrent is backed by Eclipse Ventures and Real Ventures, Archerman Capital, Samsung Catalyst Fund, and Hyundai Motor Group among others.
Join us: www.tenstorrent.com/careers.
Sr Engineer, SoC Design Verification Die-to-Die
About the role
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.
Tenstorrent is seeking a SoC Design Verification Engineer to help validate next-generation multi-chip and chiplet-based SoCs especially with Die-to-Die (D2D). You will work on test development, debug, and infrastructure that ensure robust, high-performance silicon for AI and high-compute applications. This is a hands-on role at the forefront of verification for cutting-edge semiconductor systems.
This role is hybrid, based out of Ottawa, ON.
We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.
Who You Are
- Skilled in SystemVerilog, SV-UVM, and Python with proven verification experience.
- Familiar with AI-assisted coding tools like Copilot, Cursor, or Claude to accelerate DV workflows.
- Comfortable writing detailed test plans, building infrastructure, and debugging complex issues.
- Collaborative engineer who thrives in cross-functional, fast-paced environments.
What We Need
- Develop and maintain D2D tests and supporting verification infrastructure.
- Write, execute, and track test plans for SoC, chiplet, and multi-chip designs.
- Triage, analyze, and debug issues in collaboration with design and architecture teams.
- Leverage modern AI tools to enhance verification productivity and coverage.
- Firmware co-sim with RTL and CPU core debug experience preferred
What You Will Learn
- Gain experience with advanced verification flows for chiplet and multi-die SoCs.
- Work with emerging standards like UCIe and BoW for die-to-die interconnect.
- Explore co-simulation methodologies with frameworks such as Cocotb.
- Build expertise in the intersection of AI tools and state-of-the-art verification practices.
Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
About Tenstorrent
Tenstorrent is a next-generation computing company that builds computers for AI.
Headquartered in the U.S. with offices in Austin, Texas, and Silicon Valley, and global offices in Toronto, Belgrade, Seoul, Tokyo, and Bangalore, Tenstorrent brings together experts in the field of computer architecture, ASIC design, RISC-V technology, advanced systems, and neural network compilers. Tenstorrent is backed by Eclipse Ventures and Real Ventures, Archerman Capital, Samsung Catalyst Fund, and Hyundai Motor Group among others.
Join us: www.tenstorrent.com/careers.