You Are:

You are a passionate, detail-oriented engineer who thrives on solving complex digital verification challenges. With a strong foundation in digital circuit design and hands-on experience in modern verification methodologies, you bring a proactive approach to learning and innovation. You enjoy collaborating with cross-functional teams, leveraging your technical expertise to deliver robust and reliable designs. Your curiosity drives you to stay ahead of industry trends, and your organizational skills ensure that projects progress smoothly from conception to completion.

You are comfortable navigating ambiguity and welcome the opportunity to tackle new technologies such as PCIe, USB 3/4, and MIPI CPHY/DPHY SERDES. You understand the importance of rigorous test planning, coverage analysis, and debugging, and you are adept at using industry-standard tools like SystemVerilog, UVM, and Jira. You value clear communication and are committed to continuous improvement, both for yourself and the products you help create. Whether working independently or as part of a diverse team, you bring a positive attitude, adaptability, and a genuine passion for contributing to innovations that power the future.

What You’ll Be Doing:

• Defining and tracking comprehensive verification test plans for advanced PHY designs.
• Designing and implementing constrained-random SystemVerilog testbenches leveraging UVM methodology.
• Creating and analyzing functional coverage metrics to ensure thorough verification.
• Writing SystemVerilog assertions to validate design behavior and catch corner cases.
• Debugging RTL and gate-level simulation failures, identifying root causes, and collaborating on solutions.
• Executing firmware debug and integrating with mixed-signal design teams for seamless product delivery.
• Tracking bugs using tools like Jira, ensuring issues are resolved efficiently and transparently.
• Performing code coverage analysis to identify gaps and optimize verification strategies.

The Impact You Will Have:

• Enable rapid integration of world-class silicon IP into customer SoCs, accelerating time-to-market.
• Contribute to the delivery of high-performance, low-risk mixed-signal designs that power smart technologies.
• Enhance product reliability and quality through meticulous verification and coverage analysis.
• Drive innovation in digital verification methodologies, setting industry standards for excellence.
• Support the development of differentiated products for applications ranging from AI to IoT.
• Collaborate across disciplines to ensure successful product launches and customer satisfaction.

What You’ll Need:

• BS/MS in Computer Engineering or related fields, with 2-5 years of digital design or verification experience.
• Proficiency in writing testcases using Verilog and SystemVerilog.
• Hands-on experience debugging complex testbench and design-related issues.
• Strong understanding of digital circuit design principles and verification flows.
• Familiarity with scripting languages such as Python or Perl for automation and analysis.
• Experience with verification methodologies (UVM) and industry-standard tools (Jira, etc.).

Who You Are:

• Self-learner who eagerly embraces new challenges and technologies.
• Independent thinker with excellent organizational and communication skills.
• Collaborative team player who values diversity and inclusivity.
• Detail-oriented problem solver who thrives in fast-paced environments.
• Adaptable and resilient, able to manage multiple priorities with a positive attitude.

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities, meet unique performance, power, and size requirements of their target applications, and get differentiated products to market quickly with reduced risk.

The Team You’ll Be A Part Of:

You will join the PHY Digital Design Verification team in Mississauga, Ontario. This collaborative group is dedicated to delivering high-end mixed-signal designs that drive Synopsys’ leadership in silicon IP. Working closely with digital and mixed-signal engineers, the team fosters innovation, knowledge sharing, and technical excellence, ensuring the successful verification and integration of new technologies for a wide range of applications.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.