As the global leader in high-speed connectivity, Ciena is committed to a people-first approach. Our teams enjoy a culture focused on prioritizing a flexible work environment that empowers individual growth, well-being, and belonging. We’re a technology company that leads with our humanity—driving our business priorities alongside meaningful social, community, and societal impact. What will you do at Ciena as a Digital Verification Engineer? The WaveLogic family of ASICs are at the heart of Ciena’s success in the networking industry enabling communications today and in the future. To further strengthen our team, we are looking for an enthusiastic digital verification engineer who will be involved in the verification of these products, working within a team of digital design engineers, verification engineers and architects. Your role as a digital verification engineer will be to implement innovative verification strategies, in order to thoroughly simulate and validate functional blocks and subsystems for the Forward Error Correction features of our technology.

How You Will Contribute

Read and understand the architecture and functional requirements specification document(s) Communicate and collaborate with Forward Error Correction (FEC) designers, DSP modelers, FEC verifiers, systems engineers and architects. Thoroughly validate one or more architectural functional blocks using a combination of simulation, formal, and coverage methods. Develop verification, functional coverage and formal verification test plans. Create self-checking testbench environments with stimulus generators and checkers using System Verilog, UVM and/or C++. Perform coverage-driven verification, monitor regressions, and debug failures with the support of mentors. Provide regular status updates on verification progress on a regular basis. Participate in proving our technology will meet the needs of network innovations!

The Must Haves

Minimum Bachelor's degree in Electrical or Computer Engineering, or Computer Science. Strong Programming skills in object oriented languages, preferably C/C++, SystemVerilog, UVM. Detail-oriented – Deliver on objectives through meticulous, thorough, and comprehensive work. Problem solver – Analyze and solve complex technical problems using engineering principles. Curiosity and Commitment to learning – A desire to learn, keep abreast of technology developments and keen to share your knowledge with others.

Pay Range: The annual pay range for this position is $70,700 - $112,900

Pay ranges at Ciena are designed to accommodate variations in knowledge, skills, experience, market conditions, and locations, reflecting our diverse products, industries, and lines of business. Please note that the pay range information provided in this posting pertains specifically to the primary location, which is the top location listed in case multiple locations are available. Non-Sales employees may be eligible for a discretionary incentive bonus, while Sales employees may be eligible for a sales commission. In addition to competitive compensation, Ciena offers a comprehensive benefits package, including medical, dental, and vision plans, participation in 401(K) (USA) & DCPP (Canada) with company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company-paid holidays, paid sick leave, and vacation time. We also comply with all applicable laws regarding Paid Family Leave and other leaves of absence.

At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard. Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination. Ciena is an Equal Opportunity Employer, including disability and protected veteran status. If contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require.