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Custom Analog Layout Engineer (ASIC Physical Designers – I)

  • Toronto, ON
  • Hybrid
  • Posted Sep 27, 2026
  • 1 position

$47 / hour

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Employment type
Contract
Experience level
Senior · 5+ years
Minimum education
Bachelor’s degree
Posting language
English
Working hours
40 hours per week
Office presence
2 days per week
Seniority
Associate
Application method
Direct apply is available

Job summary

Develop and optimize cell-, block-, and macro-level custom analog and mixed-signal layouts for high-speed circuits, including SerDes, while meeting verification, performance, reliability, and manufacturability requirements. Analyze parasitics and electromigration, resolve complex physical design issues, improve layout workflows, and coordinate with distributed engineering and mask design teams.

Job details

We are seeking a Custom Analog Layout Engineer / Physical Design Engineer to join an IP development team focused on advanced semiconductor technologies. In this role, you will develop custom high-speed analog and mixed-signal layouts supporting industry-leading SerDes designs on advanced technology nodes. You will collaborate with design engineers, layout and mask design professionals, and cross-functional teams across multiple locations to deliver accurate, high-quality physical designs. Location: Toronto, ON, Canada Work Model: Hybrid – primarily work from home with 1–2 days per week onsite Schedule: Monday–Friday, 8:00 AM–5:00 PM Contract Length: 8 months Pay Rate: $46.50/hour Laptop Provided Key Responsibilities Develop cell-, block-, and macro-level full-custom analog and mixed-signal layouts. Perform floorplanning and layout implementation for high-speed analog circuits. Create layouts that meet DRC and LVS verification requirements. Perform RC extraction and analyze layout parasitics to identify and resolve complex design issues. Conduct electromigration (EM) analysis and implement design improvements. Optimize layouts for performance, reliability, manufacturability, and design-rule compliance. Troubleshoot and resolve complex physical design challenges. Contribute to the development and improvement of layout methodologies, workflows, and design efficiencies. Collaborate with local and remote design engineers, mask designers, and layout teams. Provide project status and schedule updates to engineers and managers. Deliver disciplined, accurate, and high-quality results in a multi-site engineering environment. Minimum Qualifications Bachelor’s degree in Electrical Engineering. Strong understanding of: Full-custom analog layout High-speed custom layout Floorplanning RC extraction Layout optimization Physical verification DRC/LVS Ability to independently troubleshoot and resolve complex layout-related issues. Ability to collaborate effectively with distributed engineering teams. Ability and willingness to work onsite in Toronto 1–2 days per week. Preferred Qualifications Experience or knowledge in one or more of the following areas is highly desirable: SerDes or other high-speed analog circuit layouts Electrostatic discharge (ESD) Electromigration (EM) Design for manufacturability (DFM) Lithography considerations Antenna effects Semiconductor manufacturing challenges Advanced technology nodes UNIX/Linux environments UNIX scripting and debugging Apply Today!!! If you have experience developing high-performance custom analog layouts and are interested in contributing to advanced semiconductor IP development, we encourage you to apply. Please note: Only candidates who can work onsite in Toronto 1–2 days per week will be considered.

What you’ll do

Develop and optimize cell-, block-, and macro-level custom analog and mixed-signal layouts for high-speed circuits, including SerDes, while meeting verification, performance, reliability, and manufacturability requirements. Analyze parasitics and electromigration, resolve complex physical design issues, improve layout workflows, and coordinate with distributed engineering and mask design teams.

Requirements

A bachelor's degree in Electrical Engineering and strong knowledge of full-custom analog and high-speed layout, floorplanning, RC extraction, layout optimization, and DRC/LVS physical verification are required. Candidates must be able to independently troubleshoot complex layout issues, collaborate with distributed teams, and work onsite in Toronto 1–2 days per week.

Listed skills

  • Reliability · Preferred
  • Development · Preferred
  • Teams · Preferred
  • analysis · Preferred
  • Linux · Preferred
  • Team-focused · Preferred
  • Organization · Preferred
  • Attention to detail · Preferred

Other relevant skills

Identified from the job description. Confirm important requirements above.

  • Full-Custom Analog Layout
  • High-Speed Custom Layout
  • Mixed-Signal Layout
  • Floorplanning
  • RC Extraction
  • Layout Parasitics Analysis
  • Physical Verification
  • DRC/LVS
  • Electromigration Analysis
  • Layout Optimization
  • Design for Manufacturability
  • SerDes Layout
  • ESD
  • Lithography
  • UNIX/Linux
  • UNIX Scripting

Job areas

  • Engineering
  • Technology
  • Manufacturing

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