We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_
On-site · Oro-Medonte
Build and operate production agentic AI systems and data foundations on AMD Instinct GPU infrastructure. Develop memory layers, telemetry pipelines, and evaluation frameworks to ensure reliable and safe agent behavior.
On-site · Calgary
Develop software modules in C++, Python, HIP, and assembly to enable mathematical software for datacenter GPU systems. Identify and resolve performance issues while integrating optimizations into production libraries within the ROCm ecosystem.
On-site · Markham
Lead the verification of Network on Chip (NoC) IPs and subsystems by architecting simulation and formal-based verification environments. Collaborate with architects and design engineers to create test plans, develop UVM testbenches, and drive verification closure through coverage analysis.
On-site · Markham
Develop test plans and UVM-based testbenches to verify cutting-edge FPGA and ASIC IP. Collaborate with architects and engineers to run regressions and debug failures to ensure high functional and performance quality.
Hybrid · Vancouver
The role involves designing, developing, and deploying AI and automation tools to improve post-silicon engineering efficiency and workflow productivity. You will collaborate with cross-functional teams to implement CI/CD pipelines and integrate AI/ML frameworks into hardware and software development processes.
Hybrid · Markham
Lead and plan the verification of complex digital design blocks by collaborating with architects to create comprehensive test plans. Design and architect advanced testbenches to ensure functional correctness and achieve coverage closure for NOC IPs and subsystems.
On-site · Calgary
Develop and optimize software modules in C++, Python, and HIP for datacenter GPU systems. Collaborate with engineering teams to resolve performance issues and integrate new features into production libraries.
Hybrid · Markham
Collaborate with cross-functional teams to develop comprehensive test plans and UVM-based testbenches for complex IP architectures. Execute verification tests, manage regressions, and debug failures to ensure high-quality design performance and implementation.
Hybrid
You will build production-grade agentic AI systems and data foundations on AMD Instinct GPU infrastructure. This includes developing memory and context layers, engagement telemetry pipelines, and evaluation frameworks to ensure reliable agent behavior.
On-site · Markham
Analyze and evaluate Analog Mixed Signal circuit designs from external partners to ensure they meet specifications and align with chip flows. Develop and enhance automation scripts to improve the IP design analysis workflow and resolve issues before silicon manufacturing.
On-site · Markham
Analyze and verify Analog Mixed Signal IP designs from external partners to ensure they meet specifications and align with chip flows. Develop automation scripts and leverage AI technologies to improve the efficiency of design analysis and verification workflows.
Hybrid · Markham
The engineer will analyze Analog Mixed Signal circuit designs from external partners to ensure compliance with specifications and AMD's design flows. They will also develop automation scripts and collaborate with vendors to resolve design issues prior to silicon manufacturing.
Hybrid · Markham
The engineer will analyze Analog Mixed Signal circuit designs to ensure they meet specifications and integrate effectively into AMD products. They will also develop automation scripts and collaborate with third-party vendors to resolve design issues before silicon manufacturing.
On-site · Markham
Drive SOC-level design and integration by incorporating IP, fabric, and power design. Perform static verification and lead specific design domains to optimize top-level latency and performance.
Hybrid · Markham
The SOC Engineer will drive SOC-level design and integration, including IP integration, fabric management, and power design. They will also perform static verification and lead specific design domains to ensure high-performance silicon construction.
Hybrid · Markham
Design, implement, and test features to enhance GPU support in communication libraries, middleware, and frameworks. Optimize code to maximize performance of multi-node GPU applications and deliver high-quality documentation.
On-site · Markham
The role involves driving physical design power methodology optimizations across library, flow, and design environments for high-performance CPU/GPU/SOC products. Responsibilities include managing power consumption budgeting, analysis, and establishing best-known implementation recipes from synthesis to route.
On-site · Markham
The role involves implementing and verifying DFT architecture, including scan insertion and ATPG pattern generation. It also requires performing test coverage analysis and providing post-silicon support to enhance yield learning.
On-site · Markham
The role involves researching emerging AI techniques and developing Python-based AI pipelines and interactive prototypes to showcase capabilities. You will collaborate with cross-functional teams to translate new technologies into persona-based feature plans and technical documentation.
On-site · Markham
The role involves researching emerging AI techniques and developing Python-based AI pipelines and interactive product demos. You will collaborate with engineering and marketing teams to translate new technologies into concrete feature plans and validation strategies.
