Layout Engineer
The role involves performing Analog, RF, and Memory layout engineering. Responsibilities include physical verification and working with advanced process nodes.
- On-site
- Vancouver, BC
- Posted Aug 6, 2026
- Apply by Sep 5, 2026
- 1 position
Job summary
Hiring: Layout Engineers – Canada Creeno Solutions Pvt Ltd is hiring experienced Layout Engineers for immediate opportunities in Canada. Roles: Analog/RF Layout Engineer Memory Layout Engineer Location: Vancouver Canada Experience: 4+ Years Joining: Immediate Joiners Preferred Key Skills: FinFET, 5nm/3nm, Cadence Virtuoso, Calibre, DRC, LVS, Physical Verification, Analog/RF Layout, Memory Layout · Interested candidates can share their updated CV at manikanta.p@creenosolutions.com or connect with us directly.
What you’ll do
The role involves performing Analog, RF, and Memory layout engineering. Responsibilities include physical verification and working with advanced process nodes.
Requirements
Candidates must have over 4 years of experience and proficiency in Cadence Virtuoso and Calibre. Expertise in FinFET and 5nm/3nm technologies is required.
Other relevant skills
Identified from the job description. Confirm important requirements above.
- FinFET
- 5nm/3nm
- Cadence Virtuoso
- Calibre
- DRC
- LVS
- Physical Verification
- Analog Layout
- RF Layout
- Memory Layout
Job areas
- Engineering
- Technology
- Software
Additional details
- Minimum experience
- 5+ years
- Apply by
- Sep 5, 2026
- Posting language
- English
- Working hours
- 40 hours per week
- Seniority
- Entry level
- Application method
- Direct apply is available