Our Technology. Your Innovation.
Sunnyvale, California
Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.
On-site · Vancouver
You will own the product strategy and roadmap for OptoCompiler and Lumerical, translating customer needs into prioritized feature backlogs. You will also lead end-to-end product launches and collaborate cross-functionally to drive market success and revenue growth.
On-site
The System Level Test Engineer will own the system-level silicon validation of memory interface IP, including bringing up silicon and characterizing performance at speed. They will also develop test automation and debug complex failures to ensure product readiness and customer success.
On-site · Mississauga
Design and maintain Python-based automation frameworks to drive silicon validation, characterization, and system-level debug workflows. Collaborate with cross-functional teams to debug complex hardware-software interface issues and scale validation infrastructure for high-speed mixed-signal IP.
On-site · Mississauga
You will design and validate high-speed PCBs for SERDES testing while utilizing PI and SI simulation tools to optimize performance. Additionally, you will debug hardware issues, document test procedures, and interface with fabrication houses to ensure manufacturability.
Hybrid · Vancouver
Design, develop, and maintain high-performance meshing and computational geometry algorithms in C++ for production simulation products. Collaborate with cross-functional teams to optimize algorithms for CPU and GPU architectures to improve simulation performance and scalability.
On-site · Ottawa
Develop and optimize firmware for DDR, LPDDR, and HBM memory interface PHY training sequences. Debug complex hardware-software interaction issues using lab equipment and simulation tools.
On-site · Ottawa
Lead a team of firmware engineers in developing training algorithms and control logic for memory interface PHYs. Manage the full project lifecycle while collaborating with customers to resolve technical issues and define requirements.
On-site · Ottawa
Lead cross-functional teams to deliver Silicon IP projects globally from planning through completion. Act as the primary point of contact for stakeholders while defining project scope, goals, and deliverables.
On-site · Mississauga
Define transceiver architectures and analog sub-block specifications for high-speed SerDes IP while collaborating with cross-functional teams to ensure design robustness. You will also guide physical layout, execute verification strategies, and support post-silicon characterization to improve product performance.
On-site · Mississauga
Lead a hardware engineering team in the design and optimization of high-speed PCBs for silicon validation programs. Manage the full hardware lifecycle, including schematic capture, layout, simulation, and lab-based debugging to ensure product quality.
On-site · Waterloo
Design, develop, and own full-stack features while architecting software frameworks that balance performance and long-term scalability. Collaborate with cross-functional teams to translate product requirements into technical designs and mentor engineers through architectural and code reviews.
On-site · Markham
Lead customer-facing IP programs from kickoff through post-silicon support while managing schedules, milestones, and deliverables. Coordinate global teams across engineering, sales, and support to ensure successful execution and risk mitigation.
On-site · Mississauga
Lead and grow a distributed team of verification engineers while maintaining hands-on involvement in debug, testplan review, and silicon correlation. Define verification methodologies and ensure sign-off quality for high-performance SERDES PHY IP across various simulation and validation platforms.
On-site · Mississauga
Lead cross-functional teams to deliver global Silicon IP projects from planning through completion while acting as the primary point of contact for stakeholders. Manage project scope, schedules, and budgets while ensuring quality assurance and alignment with business objectives.
On-site · Mississauga
You will lead complex cross-functional engineering programs by defining project scope, managing schedules, and driving risk mitigation strategies. Additionally, you will represent R&D in customer engagements and ensure high-quality delivery through effective stakeholder communication and process adherence.
On-site · Markham
Lead the digital methodology engineering effort for Interface IP by defining and maintaining the complete RTL-to-GDSII implementation flow. Develop automation scripts and mentor global teams on best practices for timing closure and physical design tradeoffs.
On-site · Ottawa
Develop comprehensive testplans and functional coverage models for memory PHY firmware while building and maintaining robust UVM-based testbench infrastructure. Debug complex issues across firmware, RTL, and testbench layers while mentoring junior engineers and influencing design decisions through technical reviews.
On-site · Mississauga
You will collaborate with cross-functional teams to develop and maintain comprehensive simulation and verification plans for high-speed connectivity IP. Additionally, you will monitor verification metrics and coordinate with firmware developers to ensure high-quality silicon implementation and product reliability.
On-site · Ottawa
Develop and execute ATE test programs for memory interface IP while performing electrical characterization using advanced lab equipment. Collaborate with design and firmware teams to debug complex mixed-signal systems and ensure IP meets reliability and performance standards.
On-site · Mississauga
Define and drive the verification strategy for next-generation PCIe PHY IPs while architecting advanced testbench environments. Collaborate with cross-functional teams to ensure functional quality, protocol compliance, and robust coverage of complex mixed-signal designs.
