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Design Verification Engineer

  • Vancouver, British Columbia, Canada
  • Remote
  • Posted Sep 4, 2026
  • 1 position

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Employment type
Contract
Minimum education
Bachelor’s degree
Apply by
Mar 3, 2027
Posting language
English

Job summary

Develop and execute verification environments and testbenches using SystemVerilog and UVM to ensure high-quality digital designs. Analyze functional and code coverage while debugging RTL and simulation failures in collaboration with design teams.

Job details

Job Title: Design Verification Engineer Client: NeurealM/ Microchip Location: Vancouver, BC, Canada - Initial 1 month Hybrid then after Remote Job Type: Contract Job Summary We are looking for a Design Verification Engineer with strong experience in ASIC/SoC verification to develop and execute verification environments and ensure high-quality digital designs. Responsibilities Develop verification environments and testbenches using SystemVerilog and UVM. Create and execute functional, regression, and constrained-random tests. Analyze functional/code coverage and drive coverage closure. Debug RTL and simulation failures and work with design teams to resolve issues. Verify protocols such as AMBA/AXI, PCIe, Ethernet, or similar interfaces. Automate testing and regression using Python, Perl, or Shell scripting. Required Skills Strong SystemVerilog & UVM experience. Solid understanding of RTL, digital design, and ASIC/SoC verification. Experience with simulation tools such as VCS, Xcelium, or Questa. Strong debugging and scripting skills. Bachelor's/Master's degree in Electrical, Electronics, or Computer Engineering.

What you’ll do

Develop and execute verification environments and testbenches using SystemVerilog and UVM to ensure high-quality digital designs. Analyze functional and code coverage while debugging RTL and simulation failures in collaboration with design teams.

Requirements

Requires a Bachelor's or Master's degree in Electrical, Electronics, or Computer Engineering. Candidates must have strong experience with SystemVerilog, UVM, and simulation tools like VCS, Xcelium, or Questa.

Listed skills

  • Python · Preferred

Other relevant skills

Identified from the job description. Confirm important requirements above.

  • SystemVerilog
  • UVM
  • ASIC Verification
  • SoC Verification
  • RTL Debugging
  • Python
  • Perl
  • Shell Scripting
  • AMBA
  • AXI
  • PCIe
  • Ethernet
  • VCS
  • Xcelium
  • Questa
  • Digital Design

Job areas

  • Engineering
  • Technology
  • Software