Analog Design Engineer

Job Title : Analog Designer 3 I'm currently hiring for an Analog Designer 3 opportunity with a leading semiconductor client. This role is part of a SerDes Technology Group and is focused on Analog/Mixed-Signal IC Design and analog/mixed-signal building blocks for high-performance wireline transceivers. The ideal candidate will have hands-on experience with Analog/Mixed-Signal circuit design, Cadence Virtuoso, schematic design, and circuit simulation. Experience designing blocks such as LDOs, bandgaps, analog bias circuits, amplifiers, clocking circuits, ADCs, or DACs is highly relevant. Experience with advanced CMOS technology nodes, including N7, N6, N5, N3, or N2, is preferred. Experience with circuit reliability, EMIR verification, technology-node migration, and pre-/post-layout simulations is also highly desirable. Job Description : We are currently seeking an analog/mixed-signal designer to work on analog and mixed-signal building blocks in wireline transceivers. The candidate will be responsible for Own and execute analog/mixed-signal design of blocks, such as low-dropout regulators (LDOs), bandgap circuits, analog bias circuits, amplifiers, clocking circuits, ADCs and DACs. Port schematics into new technology nodes (Ex. from N3 to N2) Implement and optimize circuits for meeting the defined block specifications and functionality requirements Guide the layout designer(s) to implement the layout of the circuit blocks, and manage the quality of layout and floorplan of the circuit blocks Perform pre-layout (schematic) simulations and post-layout simulations Deliver the design reviews based on AMD SerDes team’s design methodology and design review requirements EXPERIENCE AND EDUATION: 5-7 years of relevant work experience; Experience with Schematic Design and Circuit Simulation in Cadence Virtuoso Experience in circuit reliability and EMIR verification of analog/mixed signal blocks Experience in advanced CMOS process technology nodes (N7,N6, N5, N3, N2…etc) is preferred EEO: “Mindlance is an Equal Opportunity Employer and does not discriminate in employment on the basis of – Minority/Gender/Disability/Religion/LGBTQI/Age/Veterans.”

The candidate will design and execute analog/mixed-signal building blocks for high-performance wireline transceivers. Responsibilities include porting schematics to new technology nodes and guiding layout designers to ensure quality floorplans.

Requires 5-7 years of experience in analog/mixed-signal design using Cadence Virtuoso. Proficiency in advanced CMOS technology nodes and EMIR verification is highly preferred.

• Node.jsPreferred
• OrganizationPreferred
• ReliabilityPreferred
• Attention to detailPreferred
• ProcessPreferred

Identified from the job description. Confirm important requirements above.

• Analog IC Design
• Mixed-Signal IC Design
• Cadence Virtuoso
• Schematic Design
• Circuit Simulation
• LDOs
• Bandgap Circuits
• Analog Bias Circuits
• Amplifiers
• Clocking Circuits
• ADCs
• DACs
• CMOS Technology
• EMIR Verification
• Pre-layout Simulation
• Post-layout Simulation

• Engineering
• Technology
• Manufacturing

Minimum experience

5+ years

Apply by

Oct 4, 2026

Posting language

English

Working hours

40 hours per week

Location requirements

Country, Markham, Ontario, Canada

Seniority

Associate

Application method

Direct apply is available