Opens an external site
- Employment type
- Full-time
- Experience level
- Lead · 20+ years
- Minimum education
- Master’s degree
- Posting language
- English
- Working hours
- 40 hours per week
Job summary
Own the overall SoC architecture including fabric, memory, I/O, power, and security subsystems. Drive architectural strategy, collaborate with cross-functional teams, and oversee the design process from definition through silicon bring-up.
Job details
At NUVACORE we're designing a new general-purpose CPU core for the sustained, intensive demands of AI infrastructure and agentic computing, not the workloads of the past. Founded by veteran CPU and system architects from world-class companies and backed by Sequoia Capital, we're a clean-sheet build with no legacy architecture to carry forward. THE ROLE We're looking for a Lead SoC Architect to own the SoC architecture surrounding our CPU core — fabric, memory, I/O, power, and security. You'll set architectural direction, make the system-level trade-offs, and work across design, verification, physical design, and software to see them through. WHAT YOU WILL OWN * Own the overall SoC architecture: processor complex integration, fabric topology, system level cache hierarchy, I/O, power management, and memory subsystem. * Architect the coherent fabric — interconnect/NoC topology, home node design and placement, snoop filtering, and cache coherency protocol (e.g., CHI/ACE-class) — balancing bandwidth, latency, and QoS. * Size, partition, and place system-level caches and determine their interaction with the fabric and home nodes. * Architect the I/O subsystem: PCIe and CXL controller integration and topology. * Drive memory subsystem architecture: DDR5/DDR6 and LPDDR5/LPDDR6 controller design, interleaving, and DRAM QoS/scheduling. * Establish System MMU (SMMU) architecture and I/O virtualization/translation strategy. * Architect die-to-die interconnect and chiplet partitioning for multi-die configurations (e.g., UCIe-class links). * Select, integrate, and evaluate in-house and third-party IP across the SoC, driving customization with vendors or internal IP teams as needed. * Partner with physical design and packaging teams on floorplan, 2.5D/3D packaging, and power/thermal trade-offs. * Provide top down vision/strategy and stay closely aligned with power architecture and management (clocking, reset, power states) and security architecture (domain isolation, secure boot, hardware trust boundaries), even where dedicated teams own execution. * Author and own architecture specs; drive reviews to closure with design, verification, and software. * Review downstream RTL, verification plans, and software/firmware interfaces against the spec. * Support silicon bring-up and post-silicon debug. * Mentor architects and engineers; represent SoC architecture in cross-functional discussions. WHAT WE'RE LOOKING FOR * 20+ years in SoC or system architecture, from definition through tape-out and production. * Deep expertise in coherent/non-coherent interconnect and fabric architecture, home node design, and coherency protocols. * Strong grounding in cache hierarchies and memory controller design (DDR5/DDR6, LPDDR5/LPDDR6). * Working knowledge of PCIe/CXL I/O architecture and System MMU/IO virtualization. * Experience with die-to-die interconnect and chiplet-based partitioning. * Track record integrating in-house and third-party IP, including direct work with vendors and internal IP teams. * Working knowledge of physical design constraints (floorplan, packaging, power delivery, thermal) and their architectural impact. * Working knowledge of power architecture/management and security architecture at the SoC level. * Demonstrated ability to lead architecture definition across a matrixed organization. * Strong written and verbal communication. * MS or PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field, or equivalent experience. The next great CPU won't build itself. We’re assembling a world-class team across every layer of CPU development, from architecture and design to verification, physical implementation, software, infrastructure, and product delivery. Every discipline matters, and every person has the opportunity to help shape the technology from the ground up. \n \n $200,000 - $300,000 a year \n
What you’ll do
Own the overall SoC architecture including fabric, memory, I/O, power, and security subsystems. Drive architectural strategy, collaborate with cross-functional teams, and oversee the design process from definition through silicon bring-up.
Requirements
Requires 20+ years of experience in SoC or system architecture with deep expertise in coherent interconnects and memory hierarchies. Candidates must possess strong knowledge of I/O protocols, physical design constraints, and leadership experience in a matrixed organization.
Listed skills
- Teams · Preferred
- Process · Preferred
- management · Preferred
- Packaging · Preferred
- Software · Preferred
- Integration · Preferred
- Node.js · Preferred
- Dedicated · Preferred
- Development · Preferred
- discipline · Preferred
- Leadership · Preferred
- Verbal · Preferred
Other relevant skills
Identified from the job description. Confirm important requirements above.
- SoC Architecture
- CPU Core Design
- Fabric Topology
- Cache Coherency
- Memory Subsystem
- PCIe
- CXL
- System MMU
- Chiplet Partitioning
- Power Management
- Security Architecture
- RTL
- Verification
- Physical Design
- Silicon Bring-up
- Technical Leadership
- Design Verification
- Network Quality Of Service (QoS)
- IT Security Architecture
- Electrical Engineering
- Management
- Textiles
- Computer Science
- Computer Engineering
- Debugging
- Dynamic Random-Access Memory
- Firmware
- Memory Controller
- Nodes (Networking)
- PCI Express
- Systems Architecture
- Software Technical Review
- Topology
- Verbal Communication Skills
- Virtualization
- Scheduling
- Balancing (Ledger/Billing)
Job areas
- Technology
- Engineering
- Software
- Soc Architect
- Systems Architect (General)
- Systems Analysts
- Computer Systems Engineers/Architects
- Computer Occupations, All Other
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