Circuit Design Engineer - Senior

Job summary

Design and verify custom standard cells, run simulations for cell characterization, and develop verification environments and design infrastructure. Create and qualify standard-cell EDA views, and benchmark third-party libraries for performance, power, and area in synthesis and place-and-route flows.

Job details

Position : Circuit Design Engineer - Senior Duration : 12 Months Location : Markham ON L3T 7X6 Job Type : Temporary Assignment Work Type : Onsite Pay Rate: $57.00 - $57.00/Hr Overview: TekWissen Group is a workforce management provider throughout the USA and many other countries in the world. Description: THE DEPARTMENT: Our department is responsible for developing Standard Cell Libraries, supporting 3RD party Standard Cell Libraries for all client products, and in-house Process Characterization structures. These IPs must meet client’s performance, power, area, and cost requirements in state-of-the-art CMOS technologies. We are exposed to bleeding-edge technologies that few other companies will ever hear of. We play a major role in shaping client’s roadmap and future products. THE ROLE: This role is geared towards developing required stdcell library EDA (Electronic Design Automation) views, importing 3rd Party EDA views and qualifying them to work with the tools defined in client’s Synthesis and Place and Route flows. The role also drives local design innovation and improvement of critical standard cells that are contributing the most to best power/performance per area. KEY RESPONSIBILITIES: Design and verify custom standard cells using analog design tools. Perform HSPICE/Spectre simulations for standard cells characterization. Design, develop and enhance the verification environment, including test benches for relevant EDA views (schematic/verilog/liberty views are some examples). Create, maintain and improve design flows and infrastructure systems. Benchmark 3rd party Standard Cell Libraries for performance, power, and area including through Synthesis and Place and Route. IDEAL CANDIDATE WILL HAVE: Strong knowledge of CMOS integrated circuits. Working experience with HSPICE or Spectre and other CAD tools required for schematic/layout design. Experience with ASIC EDA tools used in synthesis, place and route, simulation, static timing analysis, test insertion, and formal verification. Experience with Hardware Description Languages such as Verilog. Successful development of verification test benches using ModelSim, VCS or NCSim. Proficient in UNIX (Linux) platforms A good understanding of UNIX, C, Perl, Tcl, SPICE, JavaScript and SKILL are assets. ACADEMIC CREDENTIALS: BS in Electrical Engineering or equivalent. TekWissen® Group is an equal opportunity employer supporting workforce diversity.

What you’ll do

Design and verify custom standard cells, run simulations for cell characterization, and develop verification environments and design infrastructure. Create and qualify standard-cell EDA views, and benchmark third-party libraries for performance, power, and area in synthesis and place-and-route flows.

Requirements

Requires a bachelor’s degree in Electrical Engineering or equivalent, strong knowledge of CMOS integrated circuits, and experience with HSPICE or Spectre and schematic/layout CAD tools. Candidates should also have experience with ASIC EDA flows, Verilog, verification test benches, and UNIX/Linux; familiarity with C, Perl, Tcl, JavaScript, and SKILL is an asset.

Listed skills

• Verilog · Preferred

Other relevant skills

Identified from the job description. Confirm important requirements above.

• CMOS Integrated Circuit Design
• Custom Standard Cell Design
• HSPICE
• Spectre
• EDA Tools
• ASIC Design Flows
• Synthesis
• Place and Route
• Verilog
• Verification Test Benches
• ModelSim
• VCS
• NCSim
• Static Timing Analysis
• UNIX/Linux
• SPICE

Job areas

• Engineering
• Technology
• Science & Research

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