SiTimeVerified Job Source

Co-op ASIC Digital Verification Engineer

Ottawa, ON
On-site
Posted Oct 3, 2026
1 position

Opens an external site

Employment type: Temporary
Experience level: Entry, Junior · 0+ years
Posting language: English
Working hours: 40 hours per week

Job summary

The intern will contribute to the verification efforts of ongoing mixed-signal PLL integrated circuit projects. They will work with the verification team to develop test benches and write test cases.

Job details

About SiTime SiTime is the Precision Timing company. Timing is the heartbeat of all electronics, ensuring performance, resilience and scalability. For decades, quartz devices, non-silicon technology, have kept systems in sync, but they struggle in harsher, more demanding environments. MEMS-based Precision Timing delivers greater accuracy, smaller size and resilience. Today, MEMS timing powers over 400 applications, including high-growth ones in AI datacenters, automated driving, industrial and humanoid robots, wearables and IoT. Our semiconductor MEMS programmable solutions offer a rich feature set that enables customers to differentiate their products with higher performance, smaller size, lower power, and better reliability. With more than 4 billion devices shipped, SiTime is changing the timing industry. For more information, visit: www.sitime.com [https://www.globenewswire.com/Tracker?data=KZboO_E5KYNf2nXu9snYUrujcxPVV14r8VUqaw-krQjviK4SVzg-T3gX0Yv8pdrIU2yKG5VITW08WA-AWCTQKQ==]. Job Summary This is an existing position we are actively hiring for a temporary full-time (40 hours/week) Co-op/Intern position for 16 weeks starting in January 2027. To further strengthen the team at our Ottawa location, we are looking for a Co-op ASIC Digital Verification Engineer who will work on the development of state of the art mixed-signal PLL (phase-locked loop) integrated circuits. During the Co-op term in the Digital Verification team, you will learn about our verification environment, test bench, and test-case writing. You will be assigned several defined tasks, which will allow you to contribute to our verification team and grow your knowledge and gain experience in ASIC verification at the same time. It is not necessary to meet all job requirements to be a qualified candidate for the position. Responsibilities: * Gain exposure to ASIC verification * Contribute to verification effort of ongoing projects * Work with diverse design and verification team members, local and remote Qualifications & Requirements: * Good academic standing * Object oriented coding skills * Strong problem-solving skills * Knowledge of Verilog, SystemVerilog and UVM are assets. * Knowledge of scripting languages such as Python and Tcl is an asset. * English proficiency is required, including the ability to effectively communicate, collaborate, and perform job responsibilities in a professional business environment. Desired Characteristics & Attributes: * Fast learner with the ability to work under minimal supervision * Effective team player with good communication skills Compensation Range : (For HR only) At SiTime, we believe great work deserves great rewards. We offer a comprehensive and highly competitive compensation package designed to attract top talent. In addition to base salary, this role is eligible for a quarterly bonus tied to the achievement of innovation goals—reflecting our commitment to recognizing meaningful impact. We also offer equity grants, providing a meaningful opportunity to share in the company’s future growth and success. SiTime is an Equal Opportunity Employer [http://www.sitime.com/images/EEO-is-the-law.pdf]. We treat each person fairly and we do not tolerate discrimination or harassment against anyone on the basis of any protected characteristics, including race, color, religion, national or ethnic origin, sex, sexual orientation, gender identity or expression, age, disability, pregnancy, political affiliation, protected veteran status, protected genetic information, or marital status or other characteristics protected by law. SiTime participates in the E-Verify [http://www.sitime.com/images/E-Verify-Participation-Poster.pdf] program. Learn More about SiTime: Review the Get to Know SiTime [https://www.sitime.com/company/careers] section of our career page to explore our culture, values, and what makes us unique. * Innovation on Top – Philosophies of Innovation with Rajesh Vashist [https://www.innovatorsontap.com/podcast/the-philosophy-of-innovation-w-rajesh-vashist] * Fabrication Knowledge – An Interview with Rajesh Vashist [https://www.fabricatedknowledge.com/p/an-interview-with-rajesh-vashist-3e0#details] * SiTime Corporation – YouTube [https://www.youtube.com/user/sitimecorp/videos]

What you’ll do

The intern will contribute to the verification efforts of ongoing mixed-signal PLL integrated circuit projects. They will work with the verification team to develop test benches and write test cases.

Requirements

Candidates should be in good academic standing with strong problem-solving and object-oriented coding skills. Knowledge of Verilog, SystemVerilog, UVM, and scripting languages like Python or Tcl is considered an asset.